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Tuesday - Industry and Application day

8:30Registration
9:00Opening
9:15
Morning
AI and Networked Systems
Chair: Zoltán Micskei
Roland Gunics 15 min
Soft voting robustness in neural network ensembles with empirical analysis and formal verification
Eszterházy Károly Catholic University
9:30Chen Yuqi 30 min
Explainability and Verifiability of Artificial Intelligence in ICU Mortality Prediction
Eszterházy Károly Catholic University
10:00Christoffer Lind Andersen 30 min
Safety Analysis in Broadcast Networks Defined by Graph Grammars
Verimag, CNRS
10:30Coffee break
11:00
Invited talk 1
Chair: Zoltán Micskei
Xaver Fink
Formal methods for critical control systems at CERN
CERN
12:30Lunch
14:00
Tutorial
Chair: Zsófia Ádám
Martin Farkas
Soundness Is Not Security: Layered Verification of BPMN Collaborations with the Tamarin Prover
BME, Budapest
15:00Coffee break
15:30
Afternoon
Embedded- and Real-Time Systems
Chair: Levente Bajczi
Andrada Alexia Serban 15 min
Bridging testing and formal methods: equivalence detection and test generation for mutation testing in PLC software
BME, Budapest
15:45Richárd Szabó 30 min
Synthesizing Environment Assumptions for Coordinated Components
BME, Budapest
16:15Dóra Cziborová 30 min
Unified Timing-Aware Program Verification
BME, Budapest
16:45Dennis Eigner 15 min
A Symbolic Execution Framework for Symbolic Timing Analysis of Digital Integrated Circuits
TU Wien

Wednesday - Model checking, Exchange Formats and SMT

9:00
Morning
Model Checking and Exchange Formats
Chair: Dirk Beyer
Dániel Kovács 15 min
Combining formal verification algorithms
BME, Budapest
9:15Milán Mondok 30 min
Bringing Saturation to Concurrent Software
BME, Budapest
9:45Márk Somorjai 15 min
Precision Reuse for Exchange between Verifiers
LMU Munich
10:00Marek Jankola 30 min
Transition Invariants Revisited: Termination Witnesses and Their Validation
LMU Munich
10:30Coffee break
11:00
Invited talk 2
Chair: András Vörös
Zoltán Porkoláb
Industrial experiences in the use of static analysis
Eötvös Loránd University, Faculty of Informatics
12:30Lunch
14:00
Tutorial
Chair: András Vörös
Marian Lingsch-Rosenfeld
SV-LIB 1.0: A Standard Exchange Format for Software-Verification Tasks
LMU Munich
15:00Coffee break
15:30
Afternoon
SAT/SMT
Chair: Dirk Beyer
Anggha Stefan Nugraha 30 min
Inductive Satisfiability Certification for Universal Quantifiers and Uninterpreted Function Symbols
Institute of Computer Science Czech Academy of Sciences
16:00Timpe Hörig 15 min
Model Enumeration using IPASIR-UP without Blocking Clauses
University Freiburg
16:15Roland Graf 30 min
Solving Sums over Arrays with LIA-star
University of Regensburg
16:45David Chocholatý 15 min
Z3-Nooder and Mata: String Solving with Stabilization and Transducers
Brno University of Technology
18:00-22:00 · Wine dinner (at the venue's wine cellar)

Thursday - Software, Automata and Graphs

9:00
Morning
Software Verification and Formalisation
Chair: Oszkár Semeráth
Franziska Alber 15 min
Universality of 1-Variable Automata is Decidable
University of Regensburg
9:15Péter Bereczky 30 min
Proof assistant-based formalisation of Core Erlang
Eötvös Loránd University, Faculty of Informatics
9:45Éva Mária Szabó 15 min
A Unified Evaluation of Translation and Algorithmic Impacts in Hardware Verification
BME, Budapest
10:00Csanád Telbisz 30 min
Combining Partial Order Reduction and Abstraction
BME, Budapest
10:30Coffee break
11:00
Invited talk 3
Chair: Levente Bajczi
Oszkár Semeráth
Refinery: A graph solver for generating models
BME, Budapest
12:30Lunch
14:00
Tutorial
Chair: Oszkár Semeráth
Attila Ficsor
Modeling with Uncertainty: Using Refinery for Automated Graph Generation
BME, Budapest
15:00Closing remarks (a few minutes)
15:15Coffee break

Short talks run 15 minutes and long talks 30 minutes (discussion included), so plan for roughly 10- and 20-minute talks. Invited talks are 90 minutes and tutorials 60 minutes (discussion included).

The organizers may update the program dynamically as new requests come in, so please check back from time to time.